Lowrisc.org Website Review

our designs are permissively licensed and developed with collaborators from around the world. we implement the free and open risc-v isa. we are pursuing novel security features such as tagged memory. unlike proprietary offerings, all aspects of the design can be fully audited.. open to the core - lowrisc is unlocking the potential of open source development for the hardware world. the lowrisc platform aims to be the linux of the hardware world, providing a high quality, secure, and open base for derivative designs. we will prove our design with volume silicon manufacture and an accompanying low-cost development board. our goal is to lower the barrier of entry to producing custom silicon, establishing a vibrant ecosystem around secure and open hardware designs. lowrisc was formed as a not-for-profit community-driven organisation to pursue these aims. the lowrisc 0.6 milestone release is now available. this release includes an updated version of the rocket risc-v core, a higher core clock frequency, jtag debugging support, ethernet improvements, and more. see the release notes, for full details. we’ve also taken the opportunity to re-organise our docu*entation, adding an easy to follow quick-start guide. our next development focus is to add support for dropping in the ariane risc-v design (from eth zurich) as an alternative to rocket. read more the eighth risc-v workshop is continuing today in barcleona. as usual, i’ll be keeping a semi-live blog of talks and announcements throughout the day. look back here for the day one live blog. note that slides from most presentations are now available at riscv.org. fast interrupts for risc-v: krste asanovic embedded is a major use for risc-v. there is a desire for faster interrupt handling with support the eighth risc-v workshop is going on today in barcleona. as usual, i’ll be keeping a semi-live blog of talks and announcements throughout the day. follow here for the day two live blog. note that slides from most presentations are now available at riscv.org.