Vlsitechnology.org Website Review

Added on September 22, 2008:  Script that provides unique functions for 1-4 input cells. Added on July 14, 2008:  Paper on achieving fastest Alliance synthesis results. Added on January 12, 2008:  Release 8.5 of the standard cell libraries. Updated on November 5, 2007:  A table giving a quick check of some standard cell library Updated on November 4, 2007:  Review of open source standard cell libraries. includes standard cell libraries, which are made available under the terms of the GNU Lesser General Public Licence copied, modified and distributed under terms of your choice provided that the original copyright is prominently displayed (see section 6 of part of an extensive open source software suite for designing integrated circuits with a standard cell design methodology. The libraries have been characterised in a generic 0.13µm technology. The spice model comes from the University of California, Berkeley layout and adjusted to obey DSM layout rules. The adjustments change the timing slightly. The characterisation methodology creates a web called STXLIB, VTXLIB, VTCLIB and WTCLIB which allow routing on the metal-1 level. See the examples directory in the release file file used for VHDL simulation has been set to the cell delay driving 25fF. Release 8.4 has some small corrections and help files for file, updated DRC files, completely revised extraction parameters and extraction flow which avoids the previous kludge, and improved colours Berkeley. A comprehensive characterisation script is used, making it easy to add new cells. The transistor schematics for the libraries these libraries. Compiled versions made under Ubuntu 7.04 on Intel hardware are included in the examples directory in the library and for booting a WINDOWS computer from a LINUX Live CD like Ubuntu 6.10 and 7.04. I don't use WINDOWS much so I can't offer much help on who have LINUX installed as their operating system. The libraries were first released on September 25, 2003, with a number of revisions since